User Manual
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V 1.0
2021-08-25
XDPP1100 technical reference manual
Digital power controller
Digital pulse width modulator
Peripheral Field name
Access Address
Bits
Description
max. duty-cycle limit is scaled with
respect to the V
ref
reference defined
by parameter pid1.pid_vrect_ref as
shown below.
Max. duty = ramp1_dc_max_nom *
pid_vrect_ref/V
RECT
A setting of 0 will disable the scaled
max. duty-cycle limit and only
MAX_DUTY will apply.
LSB = 0.5 percent, range = 0.0 to
99.5 percent
pwm
lp0_ftr_vin_thresh
RW
7000_2C18h [6:0]
Loop 0 fast-transient response
(FTR) input voltage threshold.
Below this threshold, the FTR PW is
based on the FF duty cycle from the
PID. Above this threshold, the FTR
PW is reduced in proportion to V
IN
.
if (V
IN
is less than
lp0_ftr_vin_thresh)
FTR PW = FF_Duty * (T
switch
/2)
else
FTR PW = FF_Duty * (T
switch
/2) *
(lp0_ftr_vin_thresh/V
IN
)
LSB = 1 V, range = 0 to 127 V
pwm
lp1_ftr_vin_thresh
RW
7000_2C18h [13:7]
Loop 1 FTR input voltage threshold.
Below this threshold, the FTR PW is
based on the FF duty cycle from the
PID. Above this threshold, the FTR
PW is reduced in proportion to V
IN
.
if (V
IN
is less than
lp1_ftr_vin_thresh)
FTR PW = FF_Duty * (T
switch
/2)
else
FTR PW = FF_Duty * (T
switch
/2) *
(lp1_ftr_vin_thresh/V
IN
)
LSB = 1 V, range = 0 to 127 V
pwm
ramp0_phase
RW
7000_2C1Ch [7:0]
ramp0 phase alignment with
respect to sync signal selected with
ramp0_sync_sel.
Computed by FW from PMBus
command as follows:
ramp0_phase = 2^8 *
PAGE0.INTERLEAVE[3:0] /
PAGE0.INTERLEAVE[7:4]
LSB = 1.40625 degrees, range = 0.0
to 358.59375 degrees
