User Manual
305 of 562
V 1.0
2021-08-25
XDPP1100 technical reference manual
Digital power controller
Flux balance (FBAL)
Peripheral Field name
Access Address
Bits
Description
Kp = 2^-Kpshift
F3db = [kp/(1-kp)] * F
switch
/ 2pi
common
fbal_delta_abs_en
RW
7000_3030h [13]
In flux balance computation,
determines whether absolute value
applied to the error before or after
the LPF.
0: Convert to ABS value after LPF
1: Convert to ABS value before LPF
common
fbal_dcm_thresh
RW
7000_3030h [19:14] When the inductor current goes
negative the flux balance V
RECT
pulse
width measurement may become
inaccurate. It is recommended to
disable flux balancing at low
current levels to prevent incorrect
flux balance correction from
occurring. This parameter defines
the output current level below
which the flux balance correction is
disabled. A setting of 63 disables
this feature.
LSB = 0.5 A, range = 0.0 to 31.5 A
common
fbal_dcm_dis_cnt
RW
7000_3030h [21:20] Defines the number of consecutive
current samples below
fbal_dcm_thresh required to
disable flux balancing.
LSB = 1 T
switch
, range = 1 to 4 T
switch
common
fbal_dcm_ena_cnt
RW
7000_3030h [23:22] Defines the number of consecutive
current samples above
fbal_dcm_thresh required to re-
enable flux balancing.
LSB = 1 T
switch
, range = 1 to 4 T
switch
common
fbal_dcm_0out_duty_ad
j
RW
7000_3030h [24]
When flux balancing is disabled due
to low current, this parameter
determines whether to zero out the
flux balance duty-cycle correction
or to freeze the duty-cycle
correction at its current value.
0: Freeze the flux balance
correction
1: Zero out the flux balance
correction (recommended)
common
fbal1_fw_adj
RW
7000_307Ch [7:0]
When fbal1_fw_en is high, this
register overrides the Loop 0, Phase
1 HW flux/voltage balance duty-
cycle adjust output with a FW-
controlled setting.
LSB = 0.195 percent, range = 0.0 to
24.805 percent
