User Manual 333 of 562 V 1.0
2021-08-25
XDPP1100 technical reference manual
Digital power controller
Central processing unit subsystem
3002_0000h - 3002_FFFFh
64 kB
OTP
3003_0000h - 3003_FFFFh
64 kB
OTP (replica)
3004_0000h - 3FFF_FFFFh
Reserved
4000_0000h - 400F_FFFFh
CSC
M3
4010_0000h - 4FFF_FFFFh
Reserved
5000_0000h - 500F_FFFFh
OTP CONF, DMA CONF
M4
5010_0000h - 5FFF_FFFFh
Reserved
6000_0000h - 600F_FFFFh
WDT, DTIMER1/2/3, GPIO0/1
M5
6010_0000h - 6FFF_FFFFh
Reserved
7000_0000h - 7007_FFFFh
BIF REGFILE (CONTROL)
M6
7008_0000h - 700F_FFFFh
PMBus/CRC/I
2
C
M7
7010_0000h - DFFF_FFFFh
Reserved
E000_0000h - E00F_FFFFh
Cortex®-M0 private peripherals
E010_0000h - FFFF_FFFFh
Reserved
Address decoding is implemented in such a way as to minimize the digital comparators, achieving smaller and
faster logic but with the side-effect of building logical replicas into the memory map. Replicas can be used by
the FW if needed, or can be considered as reserved space.
In one case replicas are especially useful: it is simpler and more efficient for FW to have contiguous memory
space for RAM, but it can be particularly HW-expensive, with 16 kB memory size (18-bit address decoding);
allowing the memory replica and selecting by FW the proper space can grant a contiguous memory space
(2005_C000h - 2006_3FFFh).
15.2.3
Remapping feature
In microcontroller architectures based on Arm® Cortex®-M0, it is a common feature to have a remap function.
Cortex®-M0 has the interrupt table hard-coded in the lowest address space (0000_0004h - 0000_00BCh) that is
normally occupied by a non-volatile memory (NVM). In the case of XDPP1100 this is the 80 kB ROM. This means
that all interrupt serving routines (ISRs) are hard-coded and fixed.
Remap is a function that can redirect the lowest address space from ROM to RAM: addresses are rerouted on
RAM instead of ROM. In RAM, FW is able to redefine or change (from what is hard-coded in ROM) all the ISRs.
The remap function is activated by the REMAP bit in CPUS_CFG register in SCU module.
Cortex®-M0, reading address 0000_0000h, is accessing the first location of the ROM when the REMAP bit is low;
it is accessing the first location of the RAM (writable) when the REMAP bit is high.
During the boot sequence, the FW is using the ISRs in ROM, then it is copying them (or writing a new version) in
RAM and finally setting the REMAP bit to high to execute them from the RAM.
The Cortex®-M0 memory map, when REMAP is set, is shown in
