User Manual 503 of 562 V 1.0
2021-08-25
XDPP1100 technical reference manual
Digital power controller
Central processing unit subsystem
15.10.3.2
Write transaction
The following is an example of how to manage an incoming WRITE_BYTE transaction with and without PEC,
where the host places data on the I
2
C bus and the slave decodes the data. A flow chart to manage a generic
PMBus write transaction is shown in
•
Wait for PMB IRQ event and I_CODE == START_IRQ. This means there is an ongoing PMBus transaction.
•
Clear the interrupt event (write
“
1
”
into ISR.I_PMB).
•
Select the ACK/NACK source to be used for automatic generation; that is, set CTRL_RX.ACK_SRC_SEL to 1
(ADDR_LUT).
•
Wait for PMB IRQ event and I_CODE == RX_ADR_W_IRQ.
•
Clear the interrupt event (write
“
1
”
into ISR.I_PMB).
•
Read the status of the ACK signal (STATUS_REG.ACK_STATUS).
•
If ACK_STATUS == 1, then the incoming address belongs to the device, hence load DATA_LUT with a valid
command mask table, read the data byte (this is the ADDRESS), select the proper ACK source for ACK/NACK
automatic generation (CTRL_RX.ACK_SRC_SEL to 2), trigger the FSM to move forward (write
“
1
”
into
FSM_TRIGGER bit, CTRL_RX.RX_TRIGGER = 1).
•
If ACK_STATUS == 0, the FSM machine will enter the WAIT_FOR_STOP condition as soon as the trigger is
provided (CTRL_RX.RX_TRIGGER = 1); drop transaction.
•
Wait for PMB IRQ event and I_CODE == RX_IRQ.
•
Clear the interrupt event (write
“
1
”
into ISR.I_PMB).
•
Read the status of the ACK signal (STATUS_REG.ACK_STATUS).
•
If ACK_STATUS == 1, the command is valid, then depending on the received command, load DATA_LUT with
a valid data range mask, read the data byte (this is the CMD_BYTE), select the proper ACK source for
comparison (CTRL_RX.ACK_SRC_SEL to 2), trigger the FSM to move forward (write
“
1
”
into FSM_TRIGGER
bit, CTRL_RX.RX_TRIGGER = 1).
•
If ACK_STATUS == 0, trigger (CTRL_RX.RX_TRIGGER = 1), and drop the transaction as the command is not
valid (NACK was generated).
•
Wait for PMB IRQ event and I_CODE == RX_IRQ.
•
Clear the interrupt event (write
“
1
”
into ISR.I_PMB).
•
If ACK_STATUS == 1, the data is valid, read the data byte (this is the DATA BYTE), select the proper ACK
source for ACK/NACK prediction in case of PEC reception (CTRL_RX.ACK_SRC_SEL to 3), trigger the FSM to
move forward (CTRL_RX.RX_TRIGGER = 1).
•
If ACK_STATUS == 0, data was not valid, trigger FSM (CTRL_RX.RX_TRIGGER = 1) and drop the transaction.
•
Wait for the PMB IRQ event and I_CODE == RX_IRQ or I_CODE == STOP_IRQ.
•
Clear the interrupt event (write
“
1
”
into ISR.I_PMB).
•
If I_CODE == STOP_IRQ, execute the received command.
•
If I_CODE == RX_IRQ and ACK_STATUS == 1, PEC matched, transaction should be terminated, select the
proper ACK source for ACK/NACK prediction (CTRL_RX.ACK_SRC_SEL to 0, == NACK), trigger the FSM to move
forward (CTRL_RX.RX_TRIGGER = 1).
•
If I_CODE == RX_IRQ and ACK_STATUS == 0, PEC did not match; trigger machine (CTRL_RX.RX_TRIGGER = 1),
drop transaction.
•
Wait for PMB IRQ event and I_CODE == STOP_IRQ.
•
Clear the interrupt event (write
“
1
”
into ISR.I_PMB).
•
Enable execution of the received transaction (write byte in this case).
