User Manual
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V 1.0
2021-08-25
XDPP1100 technical reference manual
Digital power controller
Fault handler
Bit
Fault
Bit
Fault
[8]
VIN_UV_WARN
[20]
POWER_LIMIT_MODE
[9]
IOUT_OC_FAULT
[21]
ISHARE_FAULT
[10]
IOUT_OC_LV_FAULT
[22]
VOUT_MAX_MIN_WARN
[11]
IOUT_OC_WARN
[23]
SYNC_FAULT
9.2
Common faults
The common fault submodule is responsible for reporting faults from functions that are not specific to one
loop. This includes but is not limited to faults such as:
•
Current sense tracking fault
•
PCL fault
•
Short-circuit protection fault
•
Flux balance fault
•
Open VS protection faults
The common fault submodule reports the faults as shown in
. However, it does not handle the
detection of the common faults. This is generally handled within the module related to the fault (e.g., the flux
balance fault is detected within the flux balance module). The following subsections 9.2.1 through 9.2.6
describe the details of the common faults shown in the block diagram.
Figure 79
Common fault submodule block diagram
9.2.1
Current sense tracking fault
The XDPP1100 supports a current sense error tracking fault as described in
. The error tracking
fault is bitwise ORed with all common faults and reported on STATUS_MFR_SPECIFIC bit [4]. The individual
fault can be determined by reading the register
fault_status_com
.
9.2.2
Peak current limit fault
The XDPP1100 supports a PCL fault as described in
. The PCL fault is bitwise ORed with all
common faults and reported on STATUS_MFR_SPECIFIC bit [4]. The individual fault can be determined by
reading the register
fault_status_com
.
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[12]
[18]
fault_com_bus[31:0]
Note: Bus
connections not
shown tied to logic 0.
Fault Latching
fault_clear_com[31:0]
fault_enable_com[31:0]
fault_force_com[31:0]
fault_reg_com[31:0]
fault_status_com[31:0]
is1_track_fault
is2_track_fault
fbal1_fault
ramp0_pcl_fault
isp1_scp_fault
fbal2_fault
ramp1_pcl_fault
isp2_scp_fault
pid0_osp_duty_fault
pid1_osp_duty_fault
