User Manual 550 of 562 V 1.0
2021-08-25
XDPP1100 technical reference manual
Digital power controller
Central processing unit subsystem
Register name Field name
Access Address
Bits
Description
outputs are also fed through to the
modem inputs.
This bit is cleared to 0 on reset, to
disable loopback.
UARTCR
TXE
RW
700C_0030h [8]
Transmit enable. If this bit is set to
1, the transmit section of the UART
is enabled. Data transmission
occurs for either UART signals, or
SIR signals depending on the
setting of the SIREN bit. When the
UART is disabled in the middle of
transmission, it completes the
current character before stopping.
UARTCR
RXE
RW
700C_0030h [9]
Receive enable. If this bit is set to 1,
the receive section of the UART is
enabled. Data reception occurs for
either UART signals or SIR signals
depending on the setting of the
SIREN bit. When the UART is
disabled in the middle of reception,
it completes the current character
before stopping.
UARTCR
DTR
RW
700C_0030h [10]
Data transmit ready. This bit is the
complement of the UART data
transmit ready, nUARTDTR, modem
status output. That is, when the bit
is programmed to 1 then
nUARTDTR is LOW.
UARTCR
RTS
RW
700C_0030h [11]
Request to send. This bit is the
complement of the UART request to
send, nUARTRTS, modem status
output. That is, when the bit is
programmed to 1 then nUARTRTS
is LOW.
UARTCR
OUT1
RW
700C_0030h [12]
Complement of the UART Out1
modem status output. This bit is
the complement of the UART Out1
(nUARTOut1) modem status
output. That is, when the bit is
programmed to 1 the output is 0.
For DTE this can be used as data
carrier detect (DCD).
UARTCR
OUT2
RW
700C_0030h [13]
Complement of the UART Out2
modem status output. This bit is
the complement of the UART Out2
(nUARTOut2) modem status
output. That is, when the bit is
