Infineon XDPP1100, Technical Reference Manual

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User Manual 67 of 562 V 1.0
2021-08-25
XDPP1100 technical reference manual
Digital power controller
Telemetry sense
Figure 32 TS input muxes
The TS module contains eight timing slots with sequencing defined by the register ts_muxmode as provided in
Table 18 . Each slot represents a single conversion at 1 µs conversion rate, and 8 µs are required to cycle
through the entire sequence.
Table 18 Input sequencing
TSADC MUX2 output sequence
ts_muxmode Slot 1 Slot 2 Slot 3 Slot 4 Slot 5 Slot 6 Slot 7 Slot 8
0-3 Fixed, defined by ts_muxctrl1, 2
4 PRISEN IMON PRISEN ATSEN PRISEN IMON PRISEN BTSEN
5 PRISEN XADDR1 PRISEN ATSEN PRISEN MUX1 PRISEN BTSEN
6 PRISEN XADDR1 IMON ATSEN PRISEN MUX1 IMON BTSEN
7 PRISEN XADDR1 IMON ATSEN PRISEN MUX1 XADDR2 BTSEN
The ts_muxmode settings from 4 to 7 provide four auto-sequence modes as shown in Table 18 .
Correspondingly, when ts_muxmode is less than 4, the input mux selection is defined by registers ts_muxctrl1
and ts_muxctrl2 , as shown in Table 19 and 20 .
Table 19 MUX1 selection
ts_muxctrl1 MUX1 output
0 Internal temperature (ITSEN)
1 60 K resistor (test only)
2 XADDR1
3 XADDR2
PRISEN
IMON
(A)TSEN
BTSEN
XADDR1
XADDR2
2 MHz LPF
0
1
2
3
4
5
6
7
0.6 V
0
1
2
3
Int. Temp
60k Res
TSADC Input
mux2_sel
mux1_sel
MUX2
MUX1
2 MHz LPF
2 MHz LPF
2 MHz LPF