LPSPIx_TCR field descriptions (continued)
Field
Description
0
Continuous transfer disabled.
1
Continuous transfer enabled.
20
CONTC
Continuing Command
In master mode, this bit allows the command word to be changed within a continuous transfer. The initial
command word must enable continuous transfer (CONT=1), the continuing command must set this bit
(CONTC=1) and the continuing command word must be loaded on a frame size boundary. For example, if
the continuous transfer has a frame size of 64-bits, then a continuing command word must be loaded on a
64-bit boundary.
0
Command word for start of new transfer.
1
Command word for continuing transfer.
19
RXMSK
Receive Data Mask
When set, receive data is masked (receive data is not stored in receive FIFO).
0
Normal transfer.
1
Receive data is masked.
18
TXMSK
Transmit Data Mask
When set, transmit data is masked (no data is loaded from transmit FIFO and output pin is tristated). In
master mode, this bit will initiate a new transfer which cannot be aborted by another command word and
the bit will be cleared by hardware at the end of the transfer.
00
Normal transfer.
01
Mask transmit data.
17–16
WIDTH
Transfer Width
Either RXMSK or TXMSK must be set for 2-bit or 4-bit transfers.
00
Single bit transfer.
01
Two bit transfer.
10
Four bit transfer.
11
Reserved.
15–12
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
FRAMESZ
Frame Size
Configures the frame size in number of bits equal to (F 1). The minimum frame size is 8 bits. If
the frame size is larger than 32 bits, data will be loaded from the transmit FIFO and stored to the receive
FIFO every 32 bits. If the size of the transfer word is not divisible by 32, then the last load of the transmit
FIFO and store of the receive FIFO will contain the remainder bits (e.g.: a 72-bit transfer will load/store 32-
bits from the FIFO and then another 32-bits from the FIFO and then the final 8-bits from the FIFO).
Memory Map and Registers
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
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NXP Semiconductors
Summary of Contents for Kinetis KE1xZ256
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