NXP Semiconductors Kinetis KE1xZ256, Reference Manual

Page: 1203 / 1325

Field Function
TXFLUSH Writing to this field causes all data that is stored in the transmit FIFO/buffer to be flushed. This does not
affect data that is in the transmit shift register.
0 - No flush operation occurs.
1 - All data in the transmit FIFO/Buffer is cleared out.
14
RXFLUSH
Receive FIFO/Buffer Flush
Writing to this field causes all data that is stored in the receive FIFO/buffer to be flushed. This does not
affect data that is in the receive shift register.
0 - No flush operation occurs.
1 - All data in the receive FIFO/buffer is cleared out.
13
—
Reserved
12-10
RXIDEN
Receiver Idle Empty Enable
When set, enables the assertion of RDRF when the receiver is idle for a number of idle characters and
the FIFO is not empty.
000 - Disable RDRF assertion due to partially filled FIFO when receiver is idle.
001 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character.
010 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters.
011 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters.
100 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters.
101 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters.
110 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters.
111 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters.
9
TXOFE
Transmit FIFO Overflow Interrupt Enable
When this field is set, the TXOF flag generates an interrupt to the host.
0 - TXOF flag does not generate an interrupt to the host.
1 - TXOF flag generates an interrupt to the host.
8
RXUFE
Receive FIFO Underflow Interrupt Enable
When this field is set, the RXUF flag generates an interrupt to the host.
0 - RXUF flag does not generate an interrupt to the host.
1 - RXUF flag generates an interrupt to the host.
7
TXFE
Transmit FIFO Enable
When this field is set, the built in FIFO structure for the transmit buffer is enabled. The size of the FIFO
structure is indicated by TXFIFOSIZE. If this field is not set, the transmit buffer operates as a FIFO of
depth one dataword regardless of the value in TXFIFOSIZE. Both CTRL[TE] and CTRL[RE] must be
cleared prior to changing this field.
0 - Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support).
1 - Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE.
6-4
TXFIFOSIZE
Transmit FIFO. Buffer Depth
The maximum number of transmit datawords that can be stored in the transmit buffer. This field is read
only.
000 - Transmit FIFO/Buffer depth = 1 dataword.
001 - Transmit FIFO/Buffer depth = 4 datawords.
010 - Transmit FIFO/Buffer depth = 8 datawords.
011 - Transmit FIFO/Buffer depth = 16 datawords.
100 - Transmit FIFO/Buffer depth = 32 datawords.
101 - Transmit FIFO/Buffer depth = 64 datawords.
110 - Transmit FIFO/Buffer depth = 128 datawords.
111 - Transmit FIFO/Buffer depth = 256 datawords
3
RXFE
Receive FIFO Enable
Table continues on the next page...
Chapter 46 Low Power Universal Asynchronous Receiver/Transmitter (LPUART)
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
NXP Semiconductors 1203