NXP Semiconductors Kinetis KE1xZ256, Reference Manual

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6.4.4 Result Register (MMDVSQ_RES)
This register is loaded with the result of the divide or square root calculation. It is
updated by the MMDVSQ hardware at the completion of the calculation. When a square
root operation is performed (on an unsigned 32-bit number), the result is limited to a 16-
bit value with RES[31:16] = 0x0000. Any memory access (read or write) of the RES
register while the module is busy during a calculation causes the access to be stalled
(using wait states) until the calculation completes and the new result written into the
register.
Address: F000_4000h base + Ch offset = F000_400Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
RESULT
W
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset. •
MMDVSQ_RES field descriptions
Field Description
RESULT Result
This is the output result for a divide or square root calculation.
6.4.5 Radicand Register (MMDVSQ_RCND)
The write-only radicand register is loaded with the input “square” number. A memory
write to the radicand register initiates a square root calculation. While the MMDVSQ
module is busy performing a square root calculation, any memory write access to the
RCND register causes the write access to be stalled (using wait states) until the square
root calculation finishes. Any attempted read of the radicand register terminates with an
error.
Address: F000_4000h base + 10h offset = F000_4010h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
RADICAND
W
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset. •
Chapter 6 Memory-Mapped Divide and Square Root (MMDVSQ)
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
NXP Semiconductors 89