NXP Semiconductors Kinetis KE1xZ256, Reference Manual

Page: 385 / 1325

SCG_SOSCDIV field descriptions (continued)
Field Description
7–3
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
SOSCDIV1 System OSC Clock Divide 1
Clock divider 1 for System OSC. Used to generate the clock source for modules that need an
asynchronous clock source.
000 Output disabled
001 Divide by 1
010 Divide by 2
011 Divide by 4
100 Divide by 8
101 Divide by 16
110 Divide by 32
111 Divide by 64
18.3.9 System Oscillator Configuration Register (SCG_SOSCCFG)
The SOSCCFG register cannot be changed when the System OSC is enabled. When the
System OSC is enabled, writes to this register are ignored, and there is no transfer error.
Address: 4006_4000h base + 108h offset = 4006_4108h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
Reserved
0
RANGE HGO
EREFS
0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
SCG_SOSCCFG field descriptions
Field Description
31–12
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
11–8
Reserved
This field is reserved.
This bit is reserved. Software should write 0 to this bit field.
7–6
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
Table continues on the next page...
Chapter 18 System Clock Generator (SCG)
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
NXP Semiconductors 385