The time counter within the RTC is clocked by a 32.768 kHz clock sourced from an
external crystal using the oscillator. Alternatively, the time counter can be clocked by the
LPO and the prescaler will increment by 32 for each LPO clock.
The power-on-reset signal initializes all RTC registers to their default state. A software
reset bit can also initialize all RTC registers.
43.4.1.1 Oscillator control
The 32.768 kHz crystal oscillator is disabled at POR and must be enabled by software.
After enabling the cystal oscillator, wait the oscillator startup time before setting
SR[TCE] or using the oscillator clock external to the RTC.
43.4.1.2 Software reset
Writing 1 to CR[SWR] forces the equivalent of a POR to the rest of the RTC module.
CR[SWR] is not affected by the software reset and must be cleared by software. The
access control registers are not affected by either VBAT POR or the software reset; they
are reset by the chip reset.
43.4.1.3 Supervisor access
When the supervisor access control bit is clear, only supervisor mode software can write
to the RTC registers, non-supervisor mode software will generate a bus error. Both
supervisor and non-supervisor mode software can always read the RTC registers.
43.4.2 Time counter
The time counter consists of a 32-bit seconds counter that increments once every second
and a 16-bit prescaler register that increments once every 32.768 kHz clock cycle. There
is also the option to clock the prescaler using a 1 kHz LPO that increments the prescaler
by 32 on every clock cycle.
Reading the time counter (either seconds or prescaler) while it is incrementing may return
invalid data due to synchronization of the read data bus. If it is necessary for software to
read the prescaler or seconds counter when they could be incrementing, it is
recommended that two read accesses are performed and that software verifies that the
same data was returned for both reads.
Chapter 43 Real Time Clock (SRTC)
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
NXP Semiconductors
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