NXP Semiconductors Kinetis KE1xZ256, Reference Manual

Page: 411 / 1325

Chapter 20
Peripheral Clock Controller (PCC)
20.1 Chip-specific information for this module
20.1.1 Information of PCC on this device
The clock connection information for this module is as follows.
Clock Source : SCG Clock Source Descriptions PCS Clock Names of PCC
SOSCDIV2_CLK SOSCDIV2 of system OSC clock OSCCLK
SIRCDIV2_CLK SIRCDIV2 of slow IRC clock SCGIRCLK
FIRCDIV2_CLK FIRCDIV2 of fast IRC clock SCGFIRCLK
SFLLDIV2_CLK FLLDIV2 of LPFLL clock SCGFLLCLK
20.2 Introduction
The Peripheral Clock Control module (PCC) provides peripheral clock control and
configuration registers.
In addition to the peripheral clock gates, clock multiplexers, and clock dividers, the PCC
contains an interface between the peripherals and the system to control and acknowledge
the Stop, Doze, and Debug signals.
20.2.1 Features
The PCC module enables software to configure the following clocking options for each
peripheral:
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
NXP Semiconductors 411