PORT memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4004_A0C0 Digital Filter Enable Register (PORTB_DFER)
32
R/W
0000_0000h
4004_A0C4 Digital Filter Clock Register (PORTB_DFCR)
32
R/W
0000_0000h
4004_A0C8 Digital Filter Width Register (PORTB_DFWR)
32
R/W
0000_0000h
4004_B000 Pin Control Register n (PORTC_PCR0)
32
R/W
4004_B004 Pin Control Register n (PORTC_PCR1)
32
R/W
4004_B008 Pin Control Register n (PORTC_PCR2)
32
R/W
4004_B00C Pin Control Register n (PORTC_PCR3)
32
R/W
4004_B010 Pin Control Register n (PORTC_PCR4)
32
R/W
4004_B014 Pin Control Register n (PORTC_PCR5)
32
R/W
4004_B018 Pin Control Register n (PORTC_PCR6)
32
R/W
4004_B01C Pin Control Register n (PORTC_PCR7)
32
R/W
4004_B020 Pin Control Register n (PORTC_PCR8)
32
R/W
4004_B024 Pin Control Register n (PORTC_PCR9)
32
R/W
4004_B028 Pin Control Register n (PORTC_PCR10)
32
R/W
4004_B02C Pin Control Register n (PORTC_PCR11)
32
R/W
4004_B030 Pin Control Register n (PORTC_PCR12)
32
R/W
4004_B034 Pin Control Register n (PORTC_PCR13)
32
R/W
4004_B038 Pin Control Register n (PORTC_PCR14)
32
R/W
4004_B03C Pin Control Register n (PORTC_PCR15)
32
R/W
4004_B040 Pin Control Register n (PORTC_PCR16)
32
R/W
4004_B044 Pin Control Register n (PORTC_PCR17)
32
R/W
4004_B048 Pin Control Register n (PORTC_PCR18)
32
R/W
4004_B04C Pin Control Register n (PORTC_PCR19)
32
R/W
4004_B050 Pin Control Register n (PORTC_PCR20)
32
R/W
4004_B054 Pin Control Register n (PORTC_PCR21)
32
R/W
4004_B058 Pin Control Register n (PORTC_PCR22)
32
R/W
4004_B05C Pin Control Register n (PORTC_PCR23)
32
R/W
4004_B060 Pin Control Register n (PORTC_PCR24)
32
R/W
4004_B064 Pin Control Register n (PORTC_PCR25)
32
R/W
4004_B068 Pin Control Register n (PORTC_PCR26)
32
R/W
4004_B06C Pin Control Register n (PORTC_PCR27)
32
R/W
4004_B070 Pin Control Register n (PORTC_PCR28)
32
R/W
4004_B074 Pin Control Register n (PORTC_PCR29)
32
R/W
4004_B078 Pin Control Register n (PORTC_PCR30)
32
R/W
4004_B07C Pin Control Register n (PORTC_PCR31)
32
R/W
4004_B080 Global Pin Control Low Register (PORTC_GPCLR)
32
W
(always
reads 0)
0000_0000h
Table continues on the next page...
Memory map and register definition
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
698
NXP Semiconductors
Summary of Contents for Kinetis KE1xZ256
Page 2: ...Kinetis KE1xZ256 Sub Family Reference Manual Rev 3 07 2018 2 NXP Semiconductors...
Page 178: ...Usage Guide Kinetis KE1xZ256 Sub Family Reference Manual Rev 3 07 2018 178 NXP Semiconductors...
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Page 410: ...Interrupts Kinetis KE1xZ256 Sub Family Reference Manual Rev 3 07 2018 410 NXP Semiconductors...
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