NXP Semiconductors Kinetis KE1xZ256, Reference Manual

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Master module Master port number
ARM core I/D bus 0
ARM core system bus 1
DMA 2
The slaves connected to the crossbar switch are assigned as follows:
Slave module Slave port number
Flash memory controller 0
SRAM controllers 1
Peripheral bridge 0 / GPIO
1
2
1. See System memory map for access restrictions.
NOTE
This crossbar switch has no memory mapped configuration
registers. The arbitration method in the crossbar switch is
programmable by MCM registers.
NOTE
The AXBS master and slave configuration information can be
read from MCM registers.
9.2 Introduction
The information found here provides information on the layout, configuration, and
programming of the crossbar switch.
The crossbar switch connects bus masters and bus slaves using a crossbar switch
structure. This structure allows up to four bus masters to access different bus slaves
simultaneously, while providing arbitration among the bus masters when they access the
same slave.
9.2.1 Features
The crossbar switch includes these features:
• Symmetric crossbar bus switch implementation
• Allows concurrent accesses from different masters to different slaves
Introduction
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
126 NXP Semiconductors