For more detailed information, refer to the FMC (same module as FAU) section in
AN4745: Optimizing Performance on Kinetis K-series MCUs
.
15.2.1 FAU Features
The FAU has two key features that help to increase the chance that flash accesses can be
serviced in a single clock cycle:
• FAU cache - There is a small cache within the FAU that stores recently accessed
flash information. The exact configuration of the FAU cache can vary from device to
device, but an FAU cache is present on all devices. Note: some Kinetis devices also
contain a system cache that is completely separate from the FAU cache. The two
caches operate independently, but can be used together to help accelerate flash reads.
• Prefetch speculation buffer - As memory accesses are usually sequential, when the
FAU receives a request for a given flash location, the FAU will prefetch the next
consecutive flash data chunk. Prefetched information is stored in the prefetch
speculation buffer until a request to a different data chunk is received.
The FAU cache and prefetch speculation buffer allow the FAU to respond to flash
accesses with no added wait states in many cases. Any time the requested information is
available in the cache or prefetch buffer, the FAU responds with no added wait states.
15.2.2 FAU Configuration
The FAU cache and prefetch buffers are enabled by default. Most applications will not
require any reconfiguration of the FAU for optimal performance.
There are some programmable options that could be changed:
• Instruction vs. data cache - By default both instructions and data accesses are cached.
This can be changed so that the entire FAU cache is used for instructions only or data
only. The FAU cache could also be disabled entirely by turning off both instruction
and data caching, but this setting is not recommended when trying to increase
performance.
• Instruction vs. data prefetching - By default both instructions and data accesses can
trigger a speculative prefetch cycle.
This can be changed so that only instructions or only data accesses initiate a speculative
prefetch. Instruction only prefetching might be desired if random data accesses are mixed
in with mostly sequential instruction accesses to the same bank of flash.
Chapter 15 Flash Acceleration Unit (FAU)
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
NXP Semiconductors
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