NXP Semiconductors Kinetis KE1xZ256, Reference Manual

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33.3.1 Core Modules
Table 33-1. SWD Signal Descriptions
Chip signal name Module signal
name
Description I/O
SWD_CLK SWD_CLK Serial Wire Clock I
SWD_DIO SWD_DIO Serial Wire Data I/O
33.3.2 System Modules
Table 33-2. System Signal Descriptions
Chip signal name Module signal
name
Description I/O
NMI_b — Non-maskable interrupt NOTE: Driving the NMI signal low forces a
non-maskable interrupt, if the NMI function is selected on the
corresponding pin. I
RESET_b — Reset bidirectional signal I/O
VDD — MCU power I
VSS — MCU ground I
Table 33-3. EWM Signal Descriptions
Chip signal name Module signal
name
Description I/O
EWM_IN EWM_in EWM input for safety status of external safety circuits. The polarity
of EWM_IN is programmable using the EWM_CTRL[ASSIN] bit.
The default polarity is active-low. I
EWM_OUT_b EWM_out EWM reset out signal O
33.3.3 Clock Modules
Table 33-4. OSC (in SCG) Signal Descriptions
Chip
signal
name
Module signal name Description I/O
EXTAL EXTAL External clock/Oscillator input I
XTAL XTAL Oscillator output O
Chapter 33 Signal Multiplexing and Pin Assignment
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
NXP Semiconductors 685