NXP Semiconductors Kinetis KE1xZ256, Reference Manual

Page: 864 / 1325

FTMx_SC field descriptions (continued)
Field Description
15–10
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
9
TOF
Timer Overflow Flag
Set by hardware when the FTM counter passes the value in the MOD register. The TOF bit is cleared by
reading the SC register while TOF is set and then writing a 0 to TOF bit. Writing a 1 to TOF has no effect.
If another FTM overflow occurs between the read and write operations, the write operation has no effect;
therefore, TOF remains set indicating an overflow has occurred. In this case, a TOF interrupt request is
not lost due to the clearing sequence for a previous TOF.
0 FTM counter has not overflowed.
1 FTM counter has overflowed.
8
TOIE
Timer Overflow Interrupt Enable
Enables FTM overflow interrupts.
0 Disable TOF interrupts. Use software polling.
1 Enable TOF interrupts. An interrupt is generated when TOF equals one.
7
RF
Reload Flag
Set by hardware when FTM counter matches the value of a reload point configured by FTMxPWMLOAD
register. The RF bit is cleared by reading the SC register while RF is set and then writing a 0 to RF bit.
Writing 1 to RF has no effect.
If another reload point is reached between the read and write operations, the write operation has no effect;
therefore, RF remains set.
0 FTM counter did not reach a reload point.
1 FTM counter reached a reload point.
6
RIE
Reload Interrupt Enable
Enables the reload oportunity interrupt.
0 Reload interrupt is disabled.
1 Reload interrupt is enabled.
5
CPWMS
Center-Aligned PWM Select
Selects CPWM mode. This mode configures the FTM to operate in Up-Down Counting mode.
This field is write protected. It can be written only when MODE[WPDIS] = 1.
0 FTM counter operates in Up Counting mode.
1 FTM counter operates in Up-Down Counting mode.
4–3
CLKS
Clock Source Selection
Selects one of the three FTM counter clock sources.
This field is write protected. It can be written only when MODE[WPDIS] = 1.
00 No clock selected. This in effect disables the FTM counter.
01 FTM input clock
10 Fixed frequency clock
11 External clock
PS Prescale Factor Selection
Table continues on the next page...
Memory map and register definition
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
864 NXP Semiconductors