NXP Semiconductors Kinetis KE1xZ256, Reference Manual

Page: 1189 / 1325

46.3.1.7.1 Address
Register Offset
STAT Base a 14h offset
46.3.1.7.2 Diagram
Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
LBKD
IF
RXED
GIF MSBF RXIN
V
RWUI
D
BRK1
3
LBKD
E
RAF TDRE TC RDRF IDLE OR NF FE PF
W w1c w1c w1c w1c w1c w1c w1c
Reset
0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R MA1F MA2F 0
W w1c w1c
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
46.3.1.7.3 Fields
Field Function
31
LBKDIF
LIN Break Detect Interrupt Flag
LBKDIF is set when the LIN break detect circuitry is enabled and a LIN break character is detected.
LBKDIF is cleared by writing a 1 to it.
0 - No LIN break character has been detected.
1 - LIN break character has been detected.
30
RXEDGIF
RXD Pin Active Edge Interrupt Flag
RXEDGIF is set when an active edge, falling if RXINV = 0, rising if RXINV=1, on the RXD pin occurs.
RXEDGIF is cleared by writing a 1 to it.
0 - No active edge on the receive pin has occurred.
1 - An active edge on the receive pin has occurred.
29
MSBF
MSB First
Setting this bit reverses the order of the bits that are transmitted and received on the wire. This bit does
not affect the polarity of the bits, the location of the parity bit or the location of the start or stop bits. This
bit should only be changed when the transmitter and receiver are both disabled.
0 - LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received
after the start bit is identified as bit0.
1 - MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on
the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit
is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE].
28
RXINV
Receive Data Inversion
Setting this bit reverses the polarity of the received data input.
NOTE: Setting RXINV inverts the RXD input for all cases: data bits, start and stop bits, break, and idle.
Table continues on the next page...
Chapter 46 Low Power Universal Asynchronous Receiver/Transmitter (LPUART)
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
NXP Semiconductors 1189