38.2.4 Block diagram
This diagram illustrates the major components of the PDB.
Ch
n
trigger
PDBCH
n
DLY
0
PDBCH
n
DLY
m
=
Ack
0
Pre-trigger
0
Ch
n
pre-trigger
0
Ch
n
pre-trigger
m
=
TOS[
m
]
TOS[
0
]
EN[
0
]
EN[
m
]
MULT
Ack
m
Pre-trigger
m
Trigger-In 0
Sequence Error
Detection
ERR[
M
- 1:0]
PRESCALER
PDB Counter
PDBCNT
PDBMOD
=
Control
Logic
CONT
Trigger-In 1
Trigger-In 14
SWTRIG
TRIGSEL
PDBIDLY
=
PDB interrupt
TOE
x
=
=
PO
y
DLY2
PO
y
DLY1
Pulse
Generation
Pulse-Out
y
PDBPOEN[
y
]
Pulse-Out
y
Figure 38-1. PDB block diagram
Introduction
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
826
NXP Semiconductors
Summary of Contents for Kinetis KE1xZ256
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