NXP Semiconductors Kinetis KE1xZ256, Reference Manual

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TSI_SSC0 field descriptions (continued)
Field Description
26–25
SSC_MODE
SSC_MODE
Choosing the SSC mode.
00 Using PRBS method generating SSC output bit.
01 Using up-down counter generating SSC output bit.
10 SSC function is disabled.
11 NC.
24
SSC_
CONTROL_
REVERSE
SSC_CONTROL_REVERSE
Reversing the SSC output bit's polarity or not.
0 Keep the polarity of the SSC output bit.
1 Reverse the polarity of the SSC output bit.
23–20
CHARGE_NUM
CHARGE_NUM
Choosing the period of the SSC output bit 0's period, when using up-down counter mode.
0000 The SSC output bit 0's period will be 1 clock cycle of system clock.
0001 The SSC output bit 0's period will be 2 clock cycles of system clock.
0010 The SSC output bit 0's period will be 3 clock cycles of system clock.
0011 The SSC output bit 0's period will be 4 clock cycles of system clock.
0100 The SSC output bit 0's period will be 5 clock cycles of system clock.
0101 The SSC output bit 0's period will be 6 clock cycles of system clock.
0110 The SSC output bit 0's period will be 7 clock cycles of system clock.
0111 The SSC output bit 0's period will be 8 clock cycles of system clock.
1000 The SSC output bit 0's period will be 9 clock cycles of system clock.
1001 The SSC output bit 0's period will be 10 clock cycles of system clock.
1010 The SSC output bit 0's period will be 11 clock cycles of system clock.
1011 The SSC output bit 0's period will be 12 clock cycles of system clock.
1100 The SSC output bit 0's period will be 13 clock cycles of system clock.
1101 The SSC output bit 0's period will be 14 clock cycles of system clock.
1110 The SSC output bit 0's period will be 15 clock cycles of system clock.
1111 The SSC output bit 0's period will be 16 clock cycles of system clock.
19–16
BASE_
NOCHARGE_
NUM
BASE_NOCHARGE_NUM
Choosing the basic period of the SSC output bit 1's period, when using up-down counter mode. Together
with the TSI_SSC2[MOVE_ NOCHARGE_MAX] and TSI_SSC2[MOVE_ NOCHARGE_MIN], they are
determining the SSC output 1's period.
0000 The SSC output bit 1's basic period will be 1 clock cycle of system clock.
0001 The SSC output bit 1's basic period will be 2 clock cycles of system clock.
0010 The SSC output bit 1's basic period will be 3 clock cycles of system clock.
0011 The SSC output bit 1's basic period will be 4 clock cycles of system clock.
0100 The SSC output bit 1's basic period will be 5 clock cycles of system clock.
0101 The SSC output bit 1's basic period will be 6 clock cycles of system clock.
0110 The SSC output bit 1's basic period will be 7 clock cycles of system clock.
0111 The SSC output bit 1's basic period will be 8 clock cycles of system clock.
1000 The SSC output bit 1's basic period will be 9 clock cycles of system clock.
1001 The SSC output bit 1's basic period will be 10 clock cycles of system clock.
Table continues on the next page...
Chapter 48 Touch Sensing Input (TSI)
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
NXP Semiconductors 1293