NXP Semiconductors Kinetis KE1xZ256, Reference Manual

Page: 1065 / 1325

• Configure LPTMR to Timer counter mode by default, use LPO 128K as clock
source, bypass the prescaler;
• Set the compare value register to 1 second value;
• Enable timer interrupt ;
• Starts the timer counting after all configuration;
• In the interrupt routine, clear the channel compare flag TCF every 1 second.
The following pseudo-code matches the described setup above:
CLOCK_EnableClock(LPTMR0);
LPTMR0_CSR = 0;
LPTMR0_PSR |= LPTMR_PSR_PBYP_MASK|LPTMR_PSR_PCS(1);
LPTMR0_CMR = ONE_SECOND_VALUE;
LPTMR0_CSR |= LPTMR_CSR_TIE_MASK;
EnableIRQ(LPTMR0_IRQn);
LPTMR0_CSR |= LPTMR_CSR_TEN_MASK;
42.6.2 Pulse Counter mode
LPTMR another option is used as Pulse Counter mode to count the input pulses.
Example: LPTMR count the input pulses on LPTMR0_ALT1 pin
• Enable the LPTMR module clock;
• Configure LPTMR to Pulse counter mode, use LPO 128K as clock source, bypass
the glitch filter
• Set the compare value register to the value you want to compare the numbers of
pulse
• Enable the pulse counter input enable on LPTMR0_ALT1
• Enable timer interrupt
• Starts the pulse counting after all configuration;
• In the interrupt routine, clear the channel compare flag TCF when the counter
reaches the value in compare register;
The following pseudo-code matches the described setup above:
CLOCK_EnableClock(LPTMR0);
LPTMR0_CSR |= LPTMR_CSR_TPS(1)|LPTMR_CSR_TMS_MASK;
LPTMR0_PSR |= LPTMR_PSR_PBYP_MASK|LPTMR_PSR_PCS(1);
LPTMR0_CMR = PULSE_COMPARE_VALUE;
LPTMR0_CSR |= LPTMR_CSR_TIE_MASK;
EnableIRQ(LPTMR0_IRQn);
LPTMR0_CSR |= LPTMR_CSR_TEN_MASK;
Chapter 42 Low Power Timer (LPTMR)
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
NXP Semiconductors 1065