NXP Semiconductors Kinetis KE1xZ256, Reference Manual

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RCM_RPC field descriptions
Field Description
31–13
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
12–8
RSTFLTSEL
Reset Pin Filter Bus Clock Select
Selects the reset pin bus clock filter width:
• Transition lengths less than RSTFLTSEL cycles are filtered.
• Transition lengths between RSTFLTSEL and (RS1) cycles (inclusive) may be filtered.
• Transition lengths greater than (RS1) cycles are not filtered.
7–3
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
2
RSTFLTSS
Reset Pin Filter Select in Stop Mode
Selects how the reset pin filter is enabled in any stop mode.
0 All filtering disabled
1 LPO clock filter enabled
RSTFLTSRW Reset Pin Filter Select in Run and Wait Modes
Selects how the reset pin filter is enabled in run and wait modes.
00 All filtering disabled
01 Bus clock filter enabled for normal operation
10 LPO clock filter enabled for normal operation
11 Reserved
23.3.5 Mode Register (RCM_MR)
This register includes status flags to indicate the state of the mode pins during the last
Chip Reset.
Address: 4007_F000h base + 10h offset = 4007_F010h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0 BOOTROM 0
W
w1c
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 * * 0
* Notes:
BOOTROM field: The reset state of this register depends on the boot mode. •
Reset memory map and register descriptions
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
540 NXP Semiconductors