Command Reference
R&S
®
ZNC
647
User Manual 1173.9557.02 ─ 13
STATus:QUEStionable:INTegrity:HARDware:NTRansition
<BitPattern>
STATus:QUEStionable:LIMit<Lev>:NTRansition
<BitPattern>
Sets the negative transition filters of the
QUEStionable...
status registers. If a bit is
set, a 1 to 0 transition in the corresponding bit of the associated condition register causes
a 1 to be written in the associated bit of the corresponding event register.
Suffix:
<Lev>
.
1 | 2
Selects one of the two
QUEStionable:LIMit
registers; see
"STATus:QUEStionable:LIMit<1|2>"
Parameters:
<BitPattern>
Range:
0 to 65535 (decimal representation)
*RST:
n/a
Example:
STAT:QUES:LIM2:NTR 6
Set bits no. 1 and 2 of the
QUEStionable:LIMit2:NTRansition
register
STATus:QUEStionable:PTRansition
<BitPattern>
STATus:QUEStionable:INTegrity:PTRansition
<BitPattern>
STATus:QUEStionable:INTegrity:HARDware:PTRansition
<BitPattern>
STATus:QUEStionable:LIMit<Lev>:PTRansition
<BitPattern>
Configures the positive transition filters of the
QUEStionable...
status registers. If a
bit is set, a 0 to 1 transition in the corresponding bit of the associated condition register
causes a 1 to be written in the associated bit of the corresponding event register.
See also
chapter 5.5.5, "Reset Values of the Status Reporting System"
Suffix:
<Lev>
.
1 | 2
Selects one of the two
QUEStionable:LIMit
registers; see
"STATus:QUEStionable:LIMit<1|2>"
Parameters:
<BitPattern>
Range:
0 to 65535 (decimal representation)
*RST:
n/a
Example:
STAT:QUES:LIM2:PTR 6
Set bits no. 1 and 2 of the
QUEStionable:LIMit2:PTRansition
register
STATus:QUEStionable[:EVENt]?
STATus:QUEStionable:INTegrity[:EVENt]?
STATus:QUEStionable:INTegrity:HARDware[:EVENt]?
STATus:QUEStionable:LIMit<Lev>[:EVENt]?
These commands return the contents of the
EVENt
parts of the
QUEStionable
,
QUEStionable:INTegrity
,
QUEStionable:INTegrity:HARDware
, and
QUEStionable:LIMit<Lev>
status registers. Reading an
EVENt
register clears it.
SCPI Command Reference