R&S ZNC3, Руководство пользователя

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Remote Control
R&S
®
ZNC
353 User Manual 1173.9557.02 ─ 13
bol '&'). The results of all logical operations of this part are passed on to the sum bit via
an OR function (symbol '+').
●
ENAB bit = 0: The associated EVENt bit does not contribute to the sum bit.
●
ENAB bit = 1: If the associated EVENT bit is "1", the sum bit is set to "1" as well.
This part can be overwritten and read by the user at will. Its contents are not affected by
reading.
The sum bit is obtained from the EVENt and ENABle part for each register. The result
is then entered into a bit of the CONDition part of the higher-order register. The instrument
automatically generates the sum bit for each register. Thus an event can lead to a service
request throughout all levels of the hierarchy.
5.5.3 Contents of the Status Registers
The individual status registers are used to report different classes of instrument states or
errors. The following status registers belong to the general model described in IEEE
488.2:
●
The STatus Byte (STB) gives a rough overview of the instrument status.
●
The IST flag combines the entire status information into a single bit that can be quer-
ied in a
​
Parallel Poll .
●
The Event Status Register (ESR) indicates general instrument states.
The status registers below belong to the device-dependent SCPI register model:
●
The
STATus:OPERation
register contains conditions which are part of the instru-
ment's normal operation.
●
The
STATus:QUEStionable
register indicates whether the data currently being
acquired is of questionable quality.
●
The
STATus:QUEStionable:LIMit<1|2>
register indicates the result of the limit
check.
●
The
STATus:QUEStionable:INTegrity
register monitors hardware failures of
the analyzer.
5.5.3.1 STB and SRE
The STatus Byte (STB) provides a rough overview of the instrument status by collecting
the pieces of information of the lower registers. The STB represents the highest level
within the SCPI hierarchy. A special feature is that bit 6 acts as the summary bit of the
remaining bits of the status byte.
The STatus Byte (STB) is linked to the Service Request Enable (SRE) register on a bit-
by-bit basis.
●
The STB corresponds to the EVENt part of an SCPI register, indicating the current
instrument state. This register is cleared when it is read.
●
The SRE corresponds to the ENABle part of an SCPI register. If a bit is set in the
SRE and the associated bit in the STB changes from 0 to 1, a
​
Service Request (SRQ)
Status Reporting System