Preface
MPC5565 Microcontroller Reference Manual, Rev. 1.0
21-16
Freescale Semiconductor
21.3.3.4.1
RX Global Mask (CAN
x
_RXGMASK)
The RX global mask bits are applied to all RX identifiers excluding RX buffers 14
–
15, that have their
specific RX mask registers. Access to this register is unrestricted. Note that CANx_RXGMASK is
unaffected by soft reset (which occurs when CAN_MCR[SOFTRST] is asserted).
RX Msg in
6
1 0 1 1 1 1 1 1 0 0 0
1
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
RX Msg in
7
0 1 1 1 1 1 1 1 0 0 0
1
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
14
1
Match for Extended Format (MB3).
2
Match for Standard Format. (MB2).
3
Mismatch for MB3 because of ID0.
4
Mismatch for MB2 because of ID28.
5
Mismatch for MB3 because of ID28, Match for MB14 (uses RX14MASK).
6
Mismatch for MB14 because of ID27 (uses RX14MASK).
7
Match for MB14 (uses RX14MASK).
Address: Base + 0x0010 (CANx_RXGMASK)
Base + 0x0014 (CANx_RX14MASK)
Base + 0x0018 (CANx_RX15MASK)
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
MI28
MI27
MI26
MI25
MI24
MI23
MI22
MI21
MI20
MI19
MI18
MI17
MI16
W
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
MI15
MI14
MI13
MI12
MI11
MI10
MI9
MI8
MI7
MI6
MI5
MI4
MI3
MI2
MI1
MI0
W
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
CAN
x
_RXGMASK is unaffected by soft reset (which occurs when CAN_MCR[SOFTRST] is asserted).
Figure 21-6. RX Global Mask Register (CAN
x
_RXGMASK)
Table 21-10. CAN
x
_RXGMASK Field Descriptions
Field
Description
0–2
Reserved, should be cleared.
3–13
MI
n
Standard ID mask bits. These bits are the same mask bits for the standard and extended formats.
14–31
MI
n
Extended ID mask bits. These bits are used to mask comparison only in extended format.
Table 21-9. Mask Examples for Standard/Extended Message Buffers (continued)
Base ID
ID28.................ID18
IDE
Extended ID
ID17......................................ID0
Match
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