NXP Semiconductors MKW01Z128, Reference Manual

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Therefore, the following field locations are used to configure the SPI0 interrupts:
• NVICIPR2[23:22]
1.3.3 Asynchronous wake-up interrupt controller (AWIC)
configuration
This section summarizes how the module has been configured in the chip. Full
documentation for this module is provided by ARM and can be found at
arm.com
.
Asynchronous
Wake-up Interrupt
Controller (AWIC)
Nest
ed v
ect
or
ed
int
err
upt contr
oller
(NVIC)
Wake-up
requests
Module
Module
Clock logic
Figure 1-3. Asynchronous wake-up interrupt controller configuration
Table 1-9. Reference links to related information
Topic Related module Reference
System memory map — System memory map
Clocking — Clock distribution
Power management — Power management
Nested vectored
interrupt controller
(NVIC)
NVIC
Wake-up requests — AWIC wake-up sources
1.3.3.1 Wake-up sources
The device uses the following internal and external inputs to the AWIC module.
Table 1-10. AWIC stop wake-up sources
Wake-up source Description
Available system resets RESET pin when LPO is its clock source
Low-voltage detect Power management controller—functional in Stop mode
Low-voltage warning Power management controller—functional in Stop mode
Table continues on the next page...
Core modules
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
38 Freescale Semiconductor, Inc.