NXP Semiconductors MKW01Z128, Reference Manual, Page: 283 / 884

8.2.2 System Options Register 2 (SIM_SOPT2)
SOPT2 contains the controls for selecting many of the module clock source options on
this device. See the Clock Distribution chapter for more information including clocking
diagrams and definitions of device clocks.
Address: 4004_7000h base + 1004h offset = 4004_8004h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0 0
UART0SRC TPMSRC
0 0 0
PLLFLLSEL
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
CLKOUTSEL
RTCCLKOUTS
EL
0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SIM_SOPT2 field descriptions
Field Description
31–30
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
29–28
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
27–26
UART0SRC
UART0 Clock Source Select
Selects the clock source for the UART0 transmit and receive clock.
00 Clock disabled
01 MCGFLLCLK clock, or MCGPLLCLK/2
10 OSCERCLK clock
11 MCGIRCLK clock
25–24
TPMSRC
TPM Clock Source Select
Selects the clock source for the TPM counter clock
00 Clock disabled
01 MCGFLLCLK clock, or MCGPLLCLK/2
10 OSCERCLK clock
11 MCGIRCLK clock
Table continues on the next page...
Memory map and register definition
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
152 Freescale Semiconductor, Inc.