NXP Semiconductors MKW01Z128, Reference Manual, Page: 467 / 884

• Internal or external reference clock can be used as the FLL source.
• Can be used as a clock source for other on-chip peripherals.
• Phase-locked loop (PLL):
• Voltage-controlled oscillator (VCO)
• External reference clock is used as the PLL source.
• Modulo VCO frequency divider
• Phase/Frequency detector
• Integrated loop filter
• Can be used as a clock source for other on-chip peripherals.
• Internal reference clock generator:
• Slow clock with nine trim bits for accuracy
• Fast clock with four trim bits
• Can be used as source clock for the FLL. In FEI mode, only the slow Internal
Reference Clock (IRC) can be used as the FLL source.
• Either the slow or the fast clock can be selected as the clock source for the MCU.
• Can be used as a clock source for other on-chip peripherals.
• Control signals for the MCG external reference low power oscillator clock generators
are provided:
• HGO0, RANGE0, EREFS0
HGO1, RANGE1, EREFS1
• External clock from the Crystal Oscillator (OSC0):
• Can be used as a source for the FLL and/or the PLL.
• Can be selected as the clock source for the MCU.
• External clock from the Real Time Counter (RTC):
• Can be used as a source for the FLL only.
• Can be selected as the clock source for the MCU.
• External clock from the Crystal Oscillator (OSC1)
• Can be used as a source for the PLL only.
Introduction
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
336 Freescale Semiconductor, Inc.