NXP Semiconductors MKW01Z128, Reference Manual

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AIPS_PACRn field descriptions (continued)
Field Description
23
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
22
SP2
Supervisor Protect
Determines whether the peripheral requires supervisor privilege level for accesses. When this field is set,
the master privilege level must indicate the supervisor access attribute, and the MPR
x [MPL n ] control field
for the master must be set. If not, access terminates with an error response and no peripheral access
initiates.
0 This peripheral does not require supervisor privilege level for accesses.
1 This peripheral requires supervisor privilege level for accesses.
21
WP2
Write Protect
Determines whether the peripheral allows write accesss. When this bit is set and a write access is
attempted, access terminates with an error response and no peripheral access initiates.
0 This peripheral allows write accesses.
1 This peripheral is write protected.
20
TP2
Trusted Protect
Determines whether the peripheral allows accesses from an untrusted master. When this field is set and
an access is attempted by an untrusted master, the access terminates with an error response and no
peripheral access initiates.
0 Accesses from an untrusted master are allowed.
1 Accesses from an untrusted master are not allowed.
19
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
18
SP3
Supervisor Protect
Determines whether the peripheral requires supervisor privilege level for access. When this bit is set, the
master privilege level must indicate the supervisor access attribute, and the MPR
x [MPL n ] control bit for
the master must be set. If not, access terminates with an error response and no peripheral access
initiates.
0 This peripheral does not require supervisor privilege level for accesses.
1 This peripheral requires supervisor privilege level for accesses.
17
WP3
Write Protect
Determines whether the peripheral allows write accesses. When this field is set and a write access is
attempted, access terminates with an error response and no peripheral access initiates.
0 This peripheral allows write accesses.
1 This peripheral is write protected.
16
TP3
Trusted Protect
Determines whether the peripheral allows accesses from an untrusted master. When this bit is set and an
access is attempted by an untrusted master, the access terminates with an error response and no
peripheral access initiates.
0 Accesses from an untrusted master are allowed.
1 Accesses from an untrusted master are not allowed.
Table continues on the next page...
Chapter 17 Peripheral Bridge (AIPS-Lite)
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc. 297