NXP Semiconductors MKW01Z128, Reference Manual, Page: 856 / 884

36.3.8 I2C Range Address register (I2Cx_RA)
Address: Base a 7h offset
Bit 7 6 5 4 3 2 1 0
Read
RAD
0
Write
Reset 0 0 0 0 0 0 0 0
I2Cx_RA field descriptions
Field Description
7–1
RAD
Range Slave Address
This field contains the slave address to be used by the I2C module. The field is used in the 7-bit address
scheme. If I2C_C2[RMEN] is set to 1, any nonzero value write enables this register. This register value
can be considered as a maximum boundary in the range matching mode.
0
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
36.3.9 I2C SMBus Control and Status register (I2Cx_SMB)
NOTE
When the SCL and SDA signals are held high for a length of
time greater than the high timeout period, the SHTF1 flag sets.
Before reaching this threshold, while the system is detecting
how long these signals are being held high, a master assumes
that the bus is free. However, the SHTF1 bit is set to 1 in the
bus transmission process with the idle bus state.
NOTE
When the TCKSEL bit is set, there is no need to monitor the
SHTF1 bit because the bus speed is too high to match the
protocol of SMBus.
Address: Base a 8h offset
Bit 7 6 5 4 3 2 1 0
Read
FACK ALERTEN SIICAEN TCKSEL
SLTF SHTF1 SHTF2
SHTF2IE
Write w1c w1c
Reset
0 0 0 0 0 0 0 0
Chapter 36 Inter-Integrated Circuit (I2C)
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc. 725