NXP Semiconductors MKW01Z128, Reference Manual

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• Slave select (SS)
• Serial clock (SPSCK)
• Master out/slave in (MOSI)
• Master in/slave out (MISO)
An SPI transfer is initiated in the master SPI device by reading the SPI status register
(SPIx_S) when S[SPTEF] = 1 and then writing data to the transmit data buffer (write to
SPIx_DH:SPIx_DL). When a transfer is complete, received data is moved into the
receive data buffer. The SPIx_DH:SPIx_DL registers act as the SPI receive data buffer
for reads and as the SPI transmit data buffer for writes.
The Clock Phase Control (CPHA) and Clock Polarity Control (CPOL) bits in the SPI
Control Register 1 (SPIx_C1) select one of four possible clock formats to be used by the
SPI system. The CPOL bit simply selects a non-inverted or inverted clock. C1[CPHA] is
used to accommodate two fundamentally different protocols by sampling data on odd
numbered SPSCK edges or on even numbered SPSCK edges.
The SPI can be configured to operate as a master or as a slave. When the MSTR bit in
SPI Control Register 1 is set, master mode is selected; when C1[MSTR] is clear, slave
mode is selected.
31.4.2 Master mode
The SPI operates in master mode when C1[MSTR] is set. Only a master SPI module can
initiate transmissions. A transmission begins by reading the SPIx_S register while
S[SPTEF] = 1 and writing to the master SPI data registers. If the shift register is empty,
the byte immediately transfers to the shift register. The data begins shifting out on the
MOSI pin under the control of the serial clock.
• SPSCK
• The SPR3, SPR2, SPR1, and SPR0 baud rate selection bits in conjunction with
the SPPR2, SPPR1, and SPPR0 baud rate preselection bits in the SPI Baud Rate
register control the baud rate generator and determine the speed of the
transmission. The SPSCK pin is the SPI clock output. Through the SPSCK pin,
the baud rate generator of the master controls the shift register of the slave
peripheral.
• MOSI, MISO pin
Chapter 31 Serial Peripheral Interface (SPI)
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc. 597