NXP Semiconductors MKW01Z128, Reference Manual

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4.2.2.4 Low leakage wakeup (LLWU)
The LLWU module provides the means for a number of external pins and a number of
internal peripherals to wake the MCU from low leakage power modes. The LLWU
module is functional only in low leakage power modes. In VLLSx modes, all enabled
inputs to the LLWU can generate a system reset.
After a system reset, the LLWU retains the flags indicating the input source of the last
wakeup until the user clears them.
NOTE
Some flags are cleared in the LLWU and some flags are
required to be cleared in the peripheral module. Refer to the
individual peripheral chapters for more information.
4.2.2.5 Multipurpose clock generator loss-of-clock (LOC)
The MCG module supports an external reference clock.
If MCG_C6[CME] is set, the clock monitor is enabled. If the external reference falls
below f
loc_low
or f
loc_high
, as controlled by MCG_C2[RANGE], the MCU resets.
RCM_SRS0[LOC] is set to indicate this reset source.
NOTE
To prevent unexpected loss of clock reset events, all clock
monitors must be disabled before entering any low-power
modes, including VLPR and VLPW.
4.2.2.6 MCG loss-of-lock (LOL) reset
The MCG includes a PLL loss-of-lock detector. The detector is enabled when configured
for PEE and lock has been achieved. If MCG_C8[LOLRE] is set and the PLL Lock
Status field (MCG_S[LOLS0]) becomes set, the MCU resets. RCM_SRS0[LOL] is set to
indicate this reset source.
NOTE
This reset source does not cause a reset if the chip is in any stop
mode.
Reset
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
106 Freescale Semiconductor, Inc.