NXP Semiconductors MKW01Z128, Reference Manual

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SIM_SCGC6 field descriptions (continued)
Field Description
25
TPM1
TPM1 Clock Gate Control
Controls the clock gate to the TPM1 module.
0 Clock disabled
1 Clock enabled
24
TPM0
TPM0 Clock Gate Control
Controls the clock gate to the TPM0 module.
0 Clock disabled
1 Clock enabled
23
PIT
PIT Clock Gate Control
This bit controls the clock gate to the PIT module.
0 Clock disabled
1 Clock enabled
22–19
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
18
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
17–16
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
15
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
14–2
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
1
DMAMUX
DMA Mux Clock Gate Control
Controls the clock gate to the DMA Mux module.
0 Clock disabled
1 Clock enabled
0
FTF
Flash Memory Clock Gate Control
Controls the clock gate to the flash memory. Flash reads are still supported while the flash memory is
clock gated, but entry into low power modes is blocked.
0 Clock disabled
1 Clock enabled
Chapter 8 System Integration Module (SIM)
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc. 165