NXP Semiconductors MKW01Z128, Reference Manual, Page: 282 / 884

8.2.1 System Options Register 1 (SIM_SOPT1)
NOTE
The SOPT1 register is only reset on POR or LVD.
Address: 4004_7000h base + 0h offset = 4004_7000h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
OSC32KSEL
0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SIM_SOPT1 field descriptions
Field Description
31–20
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
19–18
OSC32KSEL
32K Oscillator Clock Select
Selects the 32 kHz clock source (ERCLK32K) for RTC and LPTMR. This field is reset only on POR/LVD.
00 System oscillator (OSC32KCLK)
01 Reserved
10 RTC_CLKIN
11 LPO 1kHz
17–16
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
Reserved This field is reserved.
This read-only field is reserved and always has the value 0.
Chapter 8 System Integration Module (SIM)
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc. 151