NXP Semiconductors MKW01Z128, Reference Manual, Page: 124 / 884

MKW01xxRM Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc. 8-1
Chapter 8
MKW01Z128 Transceiver - MCU SPI Interface
The MKW01 transceiver and CPU communicate primarily through the onboard SPI interface. MCU has
SPI0 is dedicated to the transceiver SPI interface and should not be used for other applications. The
transceiver is a SPI slave only, and the MCU SPI module must be programmed and used as a master only.
8.1 SiP Level SPI Pin Connections
The SiP level SPI pin connections are all internal to the device. Figure 8-1 shows all the SiP
interconnections with the SPI bus highlighted.
Figure 8-1. MKW01 Internal Interconnects Highlighting SPI Bus
Table 2-2 in Chapter 2 provides a complete listing of the MKW01 onboard device interconnects.
NOTE
• The MCU SPI port does not default to Port E connections, and these
connections MUST be programmed for proper device communication.
See
Section 2.3, “Internal Functional Interconnects” .
• The SPI external access Pins 57-60 are located on the bottom of the
package.
Transceiver QE32 MOSI
MISO
NSS
SCK
PTE1/MOSI
PTE2/MISO
PTE3/SS
PTE0/SPSCK
57 59 60 58
DIO0
DIO1
PTD1/KBI2P1
PTD0/KBI2P0
50 49
MC12311
MCU RESET RESET
48 33
PTE2
PTE3
PTA20/RESET_B
MOSI/PTC6 MCU
MISO/PTC7
NSS_PTD0
SCK/PTC5
60 57 58 59