NXP Semiconductors MKW01Z128, Reference Manual

Page: 746 / 884

1. Update the Control Register 1 (SPIx_C1) to enable the SPI and to control interrupt
enables. This register also sets the SPI as master or slave, determines clock phase and
polarity, and configures the main SPI options.
2. Update the Control Register 2 (SPIx_C2) to enable additional SPI functions such as
the SPI match interrupt feature, the master mode-fault function, and bidirectional
mode output as well as to control 8- or 16-bit mode selection and other optional
features.
3. Update the Baud Rate Register (SPIx_BR) to set the prescaler and bit rate divisor for
an SPI master.
4. Update the Hardware Match Register (SPIx_MH:SPIx_ML) with the value to be
compared to the receive data register for triggering an interrupt if hardware match
interrupts are enabled.
5. In the master, read SPIx_S while S[SPTEF] = 1, and then write to the transmit data
register (SPIx_DH:SPIx_DL) to begin transfer.
31.5.2 Pseudo-Code Example
In this example, the SPI module is set up for master mode with only hardware match
interrupts enabled. The SPI runs in 16-bit mode at a maximum baud rate of SPI module
clock divided by 2. Clock phase and polarity are set for an active-high SPI clock where
the first edge on SPSCK occurs at the start of the first cycle of a data transfer.
SPIx_C1=0x54(%01010100)
Bit 7 SPIE = 0 Disables receive and mode fault interrupts
Bit 6 SPE = 1 Enables the SPI system
Bit 5 SPTIE = 0 Disables SPI transmit interrupts
Bit 4 MSTR = 1 Sets the SPI module as a master SPI device
Bit 3 CPOL = 0 Configures SPI clock as active-high
Bit 2 CPHA = 1 First edge on SPSCK at start of first data transfer cycle
Bit 1 SSOE = 0 Determines SS pin function when mode fault enabled
Bit 0 LSBFE = 0 SPI serial data transfers start with most significant bit
SPIx_C2 = 0xC0(%11000000)
Bit 7 SPMIE = 1 SPI hardware match interrupt enabled
Bit 6 SPIMODE = 1 Configures SPI for 16-bit mode
Bit 5 TXDMAE = 0 DMA request disabled
Bit 4 MODFEN = 0 Disables mode fault function
Table continues on the next page...
Chapter 31 Serial Peripheral Interface (SPI)
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc. 615