NXP Semiconductors MKW01Z128, Reference Manual

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11.4.6 LLWU Flag 1 register (LLWU_F1)
LLWU_F1 contains the wakeup flags indicating which wakeup source caused the MCU
to exit LLS or VLLS mode. For LLS, this is the source causing the CPU interrupt flow.
For VLLS, this is the source causing the MCU reset flow.
The external wakeup flags are read-only and clearing a flag is accomplished by a write of
a 1 to the corresponding WUFx bit. The wakeup flag (WUFx), if set, will remain set if
the associated WUPEx bit is cleared.
NOTE
This register is reset on Chip Reset not VLLS and by reset
types that trigger Chip Reset not VLLS. It is unaffected by reset
types that do not trigger Chip Reset not VLLS. See the
Introduction details for more information.
Address: 4007_C000h base + 5h offset = 4007_C005h
Bit 7 6 5 4 3 2 1 0
Read WUF7 WUF6 WUF5 WUF4 WUF3 WUF2 WUF1 WUF0
Write w1c w1c w1c w1c w1c w1c w1c w1c
Reset 0 0 0 0 0 0 0 0
LLWU_F1 field descriptions
Field Description
7
WUF7
Wakeup Flag For LLWU_P7
Indicates that an enabled external wakeup pin was a source of exiting a low-leakage power mode. To
clear the flag, write a 1 to WUF7.
0 LLWU_P7 input was not a wakeup source
1 LLWU_P7 input was a wakeup source
6
WUF6
Wakeup Flag For LLWU_P6
Indicates that an enabled external wakeup pin was a source of exiting a low-leakage power mode. To
clear the flag, write a 1 to WUF6.
0 LLWU_P6 input was not a wakeup source
1 LLWU_P6 input was a wakeup source
5
WUF5
Wakeup Flag For LLWU_P5
Indicates that an enabled external wakeup pin was a source of exiting a low-leakage power mode. To
clear the flag, write a 1 to WUF5.
0 LLWU_P5 input was not a wakeup source
1 LLWU_P5 input was a wakeup source
Table continues on the next page...
Memory map/register definition
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
214 Freescale Semiconductor, Inc.