NXP Semiconductors MKW01Z128, Reference Manual, Page: 177 / 884

1.4.7.1 Number of peripheral bridges
This device contains one peripheral bridge.
1.4.7.2 Memory maps
The peripheral bridges are used to access the registers of most of the modules on this
device. See
AIPS0 Memory Map for the memory slot assignment for each module.
1.4.8 DMA request multiplexer configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
DMA Request
Multiplexer
DMA
controller
Requests
Module
Module
Module
Peripheral
bridge 0
Register
access
Channel
request
Figure 1-11. DMA request multiplexer configuration
Table 1-19. Reference links to related information
Topic Related module Reference
Full description DMA request
multiplexer
DMA Mux
System memory map System memory map
Clocking Clock distribution
Power management Power management
Channel request DMA controller DMA Controller
Requests DMA request sources
System modules
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
46 Freescale Semiconductor, Inc.