NXP Semiconductors MKW01Z128, Reference Manual

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Table 1-10. AWIC stop wake-up sources (continued)
Wake-up source Description
Pin interrupts Port control module—any enabled pin interrupt is capable of waking the system.
ADC The ADC is functional when using internal clock source.
CMP0 Interrupt in normal or trigger mode
I
2
Cx Address match wakeup
UART0 Any interrupt provided clock remains enabled.
UART1 and UART2 Active edge on RXD
RTC Alarm or seconds interrupt
TSI Any interrupt
NMI NMI pin
TPMx Any interrupt provided clock remains enabled.
LPTMR Any interrupt provided clock remains enabled.
SPI Slave mode interrupt
1.4 System modules
1.4.1 SIM configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Register
access
Peripheral
bridge
System integration
module (SIM)
Figure 1-4. SIM configuration
Table 1-11. Reference links to related information
Topic Related module Reference
Full description SIM SIM
System memory map — System memory map
Clocking — Clock distribution
Power management — Power management
Chapter 1 Chip Configuration
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc. 39