15.3.1.4 MTB Base Register (MTB_BASE)
The read-only MTB_BASE Register indicates where the RAM is located in the system
memory map. This register is provided to enable auto discovery of the MTB RAM
location, by a debug agent and is defined by a hardware design parameter. For this
device, the base address is defined by the expression: MTB_BASE[BASEADDR] =
0x2000_0000 - (RAM_Size/4)
Address: F000_0000h base + Ch offset = F000_000Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
R
W
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset.
•
MTB_BASE field descriptions
Field
Description
BASEADDR
BASEADDR
This value is defined with a hardwired signal and the expression: 0x2000_0000 - (RAM_Size/4). For
example, if the total RAM capacity is 16 KB, this field is 0x1FFF_F000.
15.3.1.5 Integration Mode Control Register (MTB_MODECTRL)
This register enables the device to switch from a functional mode, or default behavior,
into integration mode. It is hardwired to specific values used during the auto-discovery
process by an external debug agent.
Address: F000_0000h base + F00h offset = F000_0F00h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
R
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MTB_MODECTRL field descriptions
Field
Description
MODECTRL
MODECTRL
Hardwired to 0x0000_0000
Chapter 15 Micro Trace Buffer (MTB)
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc.
269
Summary of Contents for MKW01Z128
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Page 233: ...Module clocks MKW01Z128 MCU Reference Manual Rev 3 04 2016 102 Freescale Semiconductor Inc...
Page 513: ...Interrupts MKW01Z128 MCU Reference Manual Rev 3 04 2016 382 Freescale Semiconductor Inc...
Page 633: ...CMP Trigger Mode MKW01Z128 MCU Reference Manual Rev 3 04 2016 502 Freescale Semiconductor Inc...