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Transceiver Digital Control and Communications
MKW01xxRM Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc.
7-15
If the address filtering is expected then
AddressFiltering
must be enabled on the transmitter side as well
to prevent address byte to be encrypted.
Crc check being performed on encrypted data,
CrcOk
interrupt will occur "decryption time" before
PayloadReady
interrupt.
7.5.6
Handling Large Packets
When Payload length exceeds FIFO size (66 bytes) whether in fixed, variable or unlimited length packet
format, in addition to
PacketSent
in TX and
PayloadReady
or
CrcOk
in RX, the FIFO interrupts/flags can
be used as described below:
•
For TX:
— FIFO can be prefilled in Sleep/Standby but must be refilled "on-the-fly" during TX with the
rest of the payload.
1. Prefill FIFO (in Sleep/Standby first or directly in TX mode) until
FifoThreshold
or
FifoFull
is set
2. In TX, wait for
FifoThreshold
or
FifoNotEmpty
to be cleared (i.e. FIFO is nearly empty)
3. Write bytes into the FIFO until
FifoThreshold
or
FifoFull
is set.
4. Continue to step 2 until the entire message has been written to the FIFO (
PacketSent
will fire when
the last bit of the packet has been sent).
•
For RX:
— FIFO must be unfilled "on-the-fly" during RX to prevent FIFO overrun.
1. Start reading bytes from the FIFO when
FifoNotEmpty
or
FifoThreshold
becomes set.
2. Suspend reading from the FIFO if
FifoNotEmpty
clears before all bytes of the message have been
read.
3. Continue to step 1 until
PayloadReady
fires.
4. Read all remaining bytes from the FIFO either in RX or Sleep/Standby mode.
NOTE
AES encryption is not feasible on large packets, since all Payload bytes need
to be in the FIFO at the same time to perform encryption.
7.5.7
Packet Filtering
MKW01Z128's packet handler offers several mechanisms for packet filtering, ensuring that only useful
packets are made available to the MCU, reducing significantly system power consumption and software
complexity.
7.5.7.1
Sync Word Based
Sync word filtering/recognition is used for identifying the start of the payload and also for network
identification. As previously described, the Sync word recognition block is configured (size, error
tolerance, value) in
RegSyncValue
registers. This information is used, both for appending Sync word in
TX, and filtering packets in RX.
Summary of Contents for MKW01Z128
Page 7: ...MKW01xxRM Reference Manual Rev 3 04 2016 viii Freescale Semiconductor Inc...
Page 11: ...MKW01xxRM Reference Manual Rev 3 04 2016 xii Freescale Semiconductor Inc...
Page 133: ...MKW01Z128 MCU Reference Manual Rev 3 04 2016 2 Freescale Semiconductor Inc...
Page 233: ...Module clocks MKW01Z128 MCU Reference Manual Rev 3 04 2016 102 Freescale Semiconductor Inc...
Page 513: ...Interrupts MKW01Z128 MCU Reference Manual Rev 3 04 2016 382 Freescale Semiconductor Inc...
Page 633: ...CMP Trigger Mode MKW01Z128 MCU Reference Manual Rev 3 04 2016 502 Freescale Semiconductor Inc...