NXP Semiconductors MKW01Z128, Reference Manual, Page: 394 / 884

MTB memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
F000_0FA0 Claim TAG Set Register (MTB_TAGSET) 32 R 0000_0000h
15.3.1.6/
270
F000_0FA4 Claim TAG Clear Register (MTB_TAGCLEAR) 32 R 0000_0000h
15.3.1.7/
270
F000_0FB0 Lock Access Register (MTB_LOCKACCESS) 32 R 0000_0000h
15.3.1.8/
271
F000_0FB4 Lock Status Register (MTB_LOCKSTAT) 32 R 0000_0000h
15.3.1.9/
271
F000_0FB8 Authentication Status Register (MTB_AUTHSTAT) 32 R 0000_0000h
15.3.1.10/
271
F000_0FBC Device Architecture Register (MTB_DEVICEARCH) 32 R 4770_0A31h
15.3.1.11/
272
F000_0FC8 Device Configuration Register (MTB_DEVICECFG) 32 R 0000_0000h
15.3.1.12/
273
F000_0FCC Device Type Identifier Register (MTB_DEVICETYPID) 32 R 0000_0031h
15.3.1.13/
273
F000_0FD0 Peripheral ID Register (MTB_PERIPHID4) 32 R See section
15.3.1.14/
274
F000_0FD4 Peripheral ID Register (MTB_PERIPHID5) 32 R See section
15.3.1.14/
274
F000_0FD8 Peripheral ID Register (MTB_PERIPHID6) 32 R See section
15.3.1.14/
274
F000_0FDC Peripheral ID Register (MTB_PERIPHID7) 32 R See section
15.3.1.14/
274
F000_0FE0 Peripheral ID Register (MTB_PERIPHID0) 32 R See section
15.3.1.14/
274
F000_0FE4 Peripheral ID Register (MTB_PERIPHID1) 32 R See section
15.3.1.14/
274
F000_0FE8 Peripheral ID Register (MTB_PERIPHID2) 32 R See section
15.3.1.14/
274
F000_0FEC Peripheral ID Register (MTB_PERIPHID3) 32 R See section
15.3.1.14/
274
F000_0FF0 Component ID Register (MTB_COMPID0) 32 R See section
15.3.1.15/
274
F000_0FF4 Component ID Register (MTB_COMPID1) 32 R See section
15.3.1.15/
274
F000_0FF8 Component ID Register (MTB_COMPID2) 32 R See section
15.3.1.15/
274
F000_0FFC Component ID Register (MTB_COMPID3) 32 R See section
15.3.1.15/
274
Chapter 15 Micro Trace Buffer (MTB)
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc. 263