Sub 1 GHz Transceiver Architecture Description
MKW01xxRM Reference Manual, Rev. 3, 04/2016
5-22
Freescale Semiconductor, Inc.
5.7.14
Automatic Frequency Correction (AFC)
The AFC is based on the FEI block, and therefore the same input signal and receiver setting conditions
apply. When the AFC procedure is done,
AfcValue
is directly subtracted to the register that defines the
frequency of operation of the chip, F
RF
. The AFC can be launched:
•
Each time the receiver is enabled, if
AfcAutoOn
= 1
•
Upon user request, by setting bit
AfcStart
in
RegAfcFei
, if
AfcAutoOn
= 0
When the AFC is automatically triggered (
AfcAutoOn
= 1), the user has the option to:
•
Clear the former AFC correction value, if
AfcAutoClearOn
= 1
•
Start the AFC evaluation from the previously corrected frequency. This may be useful in systems
in which the LO keeps on drifting in the “same direction”. Aging compensation is a good example.
The receiver offers an alternate receiver bandwidth setting during the AFC phase, to accommodate large
LO drifts. If the user considers that the received signal may be out of the receiver bandwidth, a higher
channel filter bandwidth can be programmed in
RegAfcBw
, at the expense of the receiver noise floor, which
will impact sensitivity.
5.7.15
Optimized Setup for Low Modulation Index Systems
The following apply for optimizing low modulation index systems:
•
For wide band systems, where AFC is usually not required (XTAL inaccuracies do not typically
impact the sensitivity), it is recommended to offset the LO frequency of the receiver to avoid
desensitization. This can be simply done by modifying
Frf
in
RegFrfLsb
. A good generalization is
to offset the receiver’s LO by 10% of the expected transmitter frequency deviation.
•
For narrow band systems, it is recommended to perform AFC. The receiver has a dedicated AFC,
enabled when
AfcLowBetaOn
in
RegAfcCtrl
is set to 1. A frequency offset, programmable through
LowBetaAfcOffset
in
RegTestAfc
, is added and is calculated as follows:
Offset =
LowBetaAfcOffset
* 488 Hz
The user should ensure that the programmed offset exceeds the DC canceller’s cutoff frequency, set
through
DccFreqAfc
in
RegAfcBw.
Summary of Contents for MKW01Z128
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Page 133: ...MKW01Z128 MCU Reference Manual Rev 3 04 2016 2 Freescale Semiconductor Inc...
Page 233: ...Module clocks MKW01Z128 MCU Reference Manual Rev 3 04 2016 102 Freescale Semiconductor Inc...
Page 513: ...Interrupts MKW01Z128 MCU Reference Manual Rev 3 04 2016 382 Freescale Semiconductor Inc...
Page 633: ...CMP Trigger Mode MKW01Z128 MCU Reference Manual Rev 3 04 2016 502 Freescale Semiconductor Inc...