NXP Semiconductors MKW01Z128, Reference Manual, Page: 616 / 884

IRQ
INP
INM
FILTER_CNT
INV
COUT
COUT
OPE
SE
CMPO to
PAD
COUTA
1
WE
0
SE
CGMUX
COS
FILT_PER
+
-
FILT_PER
bus clock
COS
IER/F CFR/F
WINDOW/SAMPLE
1
0
EN,PMODE,HYSCTRL[1:0]
Interrupt
control
Filter
block
Window
control
Polarity
select
Clock
prescaler
divided
bus
clock
CMPO
To other SOC functions
Internal bus
Figure 25-2. Comparator module block diagram
In the CMP block diagram:
• The Window Control block is bypassed when CR1[WE] = 0
• The Filter block is bypassed when not in use.
• The Filter block acts as a simple sampler if the filter is bypassed and
CR0[FILTER_CNT] is set to 0x01.
• The Filter block filters based on multiple samples when the filter is bypassed and
CR0[FILTER_CNT] is set greater than 0x01.
• CR1[SE] = 0, the divided bus clock is used as sampling clock
• If enabled, the Filter block will incur up to one bus clock additional latency penalty
on COUT due to the fact that COUT, which is crossing clock domain boundaries,
must be resynchronized to the bus clock.
25.2 Memory map/register definitions
Chapter 25 Comparator (CMP)
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc. 485