NXP Semiconductors MKW01Z128, Reference Manual

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System Considerations
MKW01xxRM Reference Manual, Rev. 3, 04/2016
4-6 Freescale Semiconductor, Inc.
being applied to XTA and XTB pins. This output clock can be connected to pin 15 PTA18/EXTAL0 ,
externally, and provide the clock source to the MCU's MCG module, thus providing the CPU and System
clock of the MCU.
NOTE
From POR and from an MCU reset (on pin 33) the MCU will by default
select the internal RC oscillator as the clock source to the CPU.
In Idle mode (a phase of Listen mode), the 32 MHz crystal oscillator of the
transceiver is disabled. If this signal, or a derivative thereof, is used as the
MCU clock via CLKOUT to EXTAL0, care should be taken in firmware to
configure the MCU clock to an internal low-power clock immediately prior
to asserting Listen mode to prevent loss of clock affecting MCU
performance.
4.4 System Clock Sources and Configurations
The MKW01Z128 clock connections are shown in Figure 4-4 . The device allows for a wide array of
system clock configurations.
• Pins are provided for a separate external clock source for the CPU. The external clock source can
by derived from a crystal oscillator or from an external clock source
• The transceiver optionally provides a ClkOut programmable frequency clock output that can be
used as an external source to the CPU. As a result, a single crystal system clock solution is possible.
This is the preferred configuration
• Pins are provided for a 32 MHz crystal for the transceiver reference oscillator (crystal can be 28 to
33 MHz but all frequencies derived from Fref must be appropriately calculated)
• The MCU contains an internal nominal 32 kHz clock oscillator (which can be trimmed) that can
be used to run the MCU
• Out of reset, the MCU uses the internal oscillator and the on-chip FLL to generate an
approximately 20 MHz clock for start-up. This allows recovery from stop or reset without a long
crystal start-up delay
In addition, the transceiver has an on-chip RC oscillator that is used only internally for triggering periodic
listen modes.