NXP Semiconductors MKW01Z128, Reference Manual

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System Considerations
MKW01xxRM Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc. 4-5
Figure 4-2. POR Timing Diagram
NOTE
Any CLKOUT activity can also be used to detect when the chip is ready.
4.3.2.2.2 Transceiver Hardware Reset
A hardware reset of the transceiver on MKW01Z128 is also possible by asserting RESET high for a
minimum of one hundred microseconds, and then releasing. The application must wait 5 ms before using
the chip.
Figure 4-3. Manual Reset Timing Diagram
NOTE
While RESET is driven high, additional current consumption of up to ten
milliamps may be seen on VDD.
4.3.2.3 MCU Control of Transceiver Reset
It is recommended to provide hardware reset capability of the transceiver via an MCU GPIO externally
connected to the transceiver RESET pin. For Freescale applications software, MCU signal PTE30 is the
preferred GPIO to control the RESET.
4.3.3 External Clock Connections
It is possible that the transceiver can supply a clock source to the MCU through external connections. The
transceiver can output a clock signal on pin 54 DIO5/CLKOUT. The transceiver can be configured (via
the SPI) to select various clock frequencies that are divided from the transceiver external crystal frequency