As a result, undecorated GPIO references and decorated AND, OR, XOR, LAC1 and
LAS1 operations can use the standard 0x400F_F000 base address, while decorated BFI
and UBFX operations must use the alternate 0x4000_F000 base address. Another
implementation can simply use 0x400F_F000 as the base address for all undecorated
GPIO accesses and 0x4000_F000 as the base address for all decorated accesses. Both
implementations are supported by the hardware.
Table 13-8. Decorated peripheral and GPIO address details
Peripheral address space
Description
0x4000_0000–0x4007_FFFF
Undecorated (normal) peripheral accesses
0x4008_0000–0x400F_EFFF
Illegal addresses; attempted references are aborted and error terminated
0x400F_F000–0x400F_FFFF
Undecorated (normal) GPIO accesses using standard address
0x4010_0000–0x43FF_FFFF
Illegal addresses; attempted references are aborted and error terminated
0x4400_0000–0x4FFF_FFFF
Decorated AND, OR, XOR, LAC1, LAS1 references to peripherals and GPIO based at
either 0x4000_F000 or 0x400F_F000
0x5000_0000–0x5FFF_FFFF
Decorated BFI, UBFX references to peripherals and GPIO only based at 0x4000_F000
13.4 Application information
In this section, GNU assembler macros with C expression operands are presented as
examples of the required instructions to perform decorated operations.
This section specifically presents a partial bme.h file defining the assembly language
expressions for decorated logical stores: AND, OR, and XOR. Comparable functions for
BFI and the decorated loads are more complex and available in the complete BME header
file.
These macros use the same function names presented in
#define IOANDW(ADDR,WDATA) \
__asm("ldr r3, =(1<<26);" \
"orr r3, %[addr];" \
"mov r2, %[wdata];" \
"str r2, [r3];" \
:: [addr] "r" (ADDR), [wdata] "r" (WDATA) : "r2", "r3");
#define IOANDH(ADDR,WDATA) \
__asm("ldr r3, =(1<<26);" \
"orr r3, %[addr];" \
"mov r2, %[wdata];" \
"strh r2, [r3];" \
:: [addr] "r" (ADDR), [wdata] "r" (WDATA) : "r2", "r3");
#define IOANDB(ADDR,WDATA) \
__asm("ldr r3, =(1<<26);" \
"orr r3, %[addr];" \
"mov r2, %[wdata];" \
"strb r2, [r3];" \
:: [addr] "r" (ADDR), [wdata] "r" (WDATA) : "r2", "r3");
Application information
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
246
Freescale Semiconductor, Inc.
Summary of Contents for MKW01Z128
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Page 633: ...CMP Trigger Mode MKW01Z128 MCU Reference Manual Rev 3 04 2016 502 Freescale Semiconductor Inc...