NXP Semiconductors MKW01Z128, Reference Manual

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SPIx_C2 field descriptions (continued)
Field Description
2
RXDMAE
Receive DMA enable
This is the enable bit for a receive DMA request. When this bit is set to 1, a receive DMA request is
asserted when both SPRF and SPE are set, and the interrupt from SPRF is disabled.
0 DMA request for receive is disabled and interrupt from SPRF is allowed
1 DMA request for receive is enabled and interrupt from SPRF is disabled
1
SPISWAI
SPI Stop in Wait Mode
This bit is used for power conservation while the device is in Wait mode.
0 SPI clocks continue to operate in Wait mode.
1 SPI clocks stop when the MCU enters Wait mode.
0
SPC0
SPI Pin Control 0
Enables bidirectional pin configurations.
0 SPI uses separate pins for data input and data output (pin mode is normal).
In master mode of operation: MISO is master in and MOSI is master out.
In slave mode of operation: MISO is slave out and MOSI is slave in.
1 SPI configured for single-wire bidirectional operation (pin mode is bidirectional).
In master mode of operation: MISO is not used by SPI; MOSI is master in when BIDIROE is 0 or
master I/O when BIDIROE is 1.
In slave mode of operation: MISO is slave in when BIDIROE is 0 or slave I/O when BIDIROE is 1;
MOSI is not used by SPI.
31.3.4 SPI Control Register 1 (SPIx_C1)
This read/write register includes the SPI enable control, interrupt enables, and
configuration options.
Address: Base a 3h offset
Bit 7 6 5 4 3 2 1 0
Read
SPIE SPE SPTIE MSTR CPOL CPHA SSOE LSBFE
Write
Reset
0 0 0 0 0 1 0 0
SPIx_C1 field descriptions
Field Description
7
SPIE
SPI Interrupt Enable: for SPRF and MODF (when FIFO is not supported or not enabled) or for read FIFO
(when FIFO is supported and enabled)
When the FIFO is not supported or not enabled (FIFOMODE is not present or is 0): Enables the interrupt
for SPI receive buffer full (SPRF) and mode fault (MODF) events.
Table continues on the next page...
Chapter 31 Serial Peripheral Interface (SPI)
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc. 589