NXP Semiconductors MKW01Z128, Reference Manual

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Address: F000_0000h base + 8h offset = F000_0008h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
WATERMARK
W
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
WATERMARK
0
AUTOHALT
AUTOSTOP
W
Reset x* x* x* x* x* x* x* x* x* x* x* x* x* 0 x* x*
* Notes:
x = Undefined at reset. •
MTB_FLOW field descriptions
Field Description
31–3
WATERMARK
WATERMARK[28:0]
This field contains an address in the same format as the MTB_POSITION[POINTER] field. When
MTB_POSITION[POINTER] matches the WATERMARK field value, actions defined by the AUTOHALT
and AUTOSTOP bits are performed.
2
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
1
AUTOHALT
AUTOHALT
If this field is 1 and WATERMARK is equal to MTB_POSITION[POINTER], then
MTB_MASTER[HALTREQ] is automatically set to 1. If the DBGEN signal is HIGH, the MTB asserts this
halt request to the Cortex-M0+ processor by asserting the EDBGRQ signal.
0
AUTOSTOP
AUTOSTOP
If this field is 1 and WATERMARK is equal to MTB_POSITION[POINTER], then MTB_MASTER[EN] is
automatically set to 0. This stops tracing.
Memory map and register definition
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
268 Freescale Semiconductor, Inc.